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2V~6V 67MHz D-Type Flip Flop DUAL 2μA 74HC Series 14-SOIC (0.154, 3.90mm Width)
- Manufacturer: Toshiba Semiconductor and Storage
- NO: FEILIDI-74HC74D
- Package: 14-SOIC (0.154, 3.90mm Width)
- Datasheet:
- Stock: 3792
- Description: 2V~6V 67MHz D-Type Flip Flop DUAL 2μA 74HC Series 14-SOIC (0.154, 3.90mm Width)(Kg)
- Delivery:
- Payment:
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| Parameters | |
|---|---|
| Input Capacitance | 5pF |
| Function | Set(Preset) and Reset |
| Voltage - Supply | 2V~6V |
| Family | HC/UH |
| Clock Frequency | 67MHz |
| Trigger Type | Positive Edge |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max Propagation Delay @ V, Max CL | 26ns @ 6V, 50pF |
| Current - Quiescent (Iq) | 2μA |
| Factory Lead Time | 12 Weeks |
| Packaging | Cut Tape (CT) |
| Series | 74HC |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Length | 8.65mm |
| RoHS Status | RoHS Compliant |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Width | 3.9mm |
| Mounting Type | Surface Mount |
| Operating Temperature | -40°C~85°C TA |
| Technology | CMOS |
| Type | D-Type |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 4.5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Output Type | Differential |
| Surface Mount | YES |
| Supply Voltage-Min (Vsup) | 2V |
| Supply Voltage-Max (Vsup) | 6V |
| Number of Elements | 2 |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
74HC74D Overview
As a result, it is packaged as 14-SOIC (0.154, 3.90mm Width). It is contained within the Cut Tape (CT)package. T flip flop uses Differentialas the output. There is a trigger configured with Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at 2V~6Vvolts. -40°C~85°C TAis the operating temperature. D-Typedescribes this flip flop. In terms of FPGAs, it belongs to the 74HC series. A frequency of 67MHzshould be the maximum output frequency. A total of 2 elements are present. T flip flop consumes 2μA quiescent energy. There are 14 terminations,A voltage of 4.5V is used as the power supply for this D latch. This JK flip flop has a 5pFfarad input capacitance. An electronic device belonging to the family HC/UHcan be found here. It reaches 6Vwhen the maximum supply voltage (Vsup) is applied. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation.
74HC74D Features
Cut Tape (CT) package
74HC series
74HC74D Applications
There are a lot of Toshiba Semiconductor and Storage 74HC74D Flip Flops applications.
- Test & Measurement
- Buffered Clock
- Automotive
- Registers
- Shift Registers
- Supports Live Insertion
- Set-reset capability
- Asynchronous counter
- Guaranteed simultaneous switching noise level
- Count Modes
