74F374SC

4.5V~5.5V 140MHz D-Type Flip Flop DUAL 86mA 74F Series 20-SOIC (0.295, 7.50mm Width)

Manufacturer: Rochester Electronics
NO: 699-74F374SC
Package: 20-SOIC (0.295, 7.50mm Width)
Datasheet:
Stock: 6004
Description: 4.5V~5.5V 140MHz D-Type Flip Flop DUAL 86mA 74F Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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FedEx International, 5-7 business days.

The following are some common countries' logistic time. transport

SPECIFICATIONS

Parameters
Mounting Type	Surface Mount
Package / Case	20-SOIC (0.295, 7.50mm Width)
Surface Mount	YES
Operating Temperature	0°C~70°C TA
Packaging	Tube
Published	2013
Series	74F
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
Type	D-Type
Terminal Finish	MATTE TIN
Technology	TTL
Voltage - Supply	4.5V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
JESD-30 Code	R-PDSO-G20
Function	Standard
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Supply Voltage-Max (Vsup)	5.5V
Supply Voltage-Min (Vsup)	4.5V
Number of Ports	2
Clock Frequency	140MHz
Family	F/FAST
Current - Quiescent (Iq)	86mA
Output Characteristics	3-STATE
Current - Output High, Low	3mA 24mA
Output Polarity	TRUE
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	8.5ns @ 5V, 50pF
Trigger Type	Positive Edge
Height Seated (Max)	2.65mm
Width	7.5mm
RoHS Status	ROHS3 Compliant

74F374SC Overview

The flip flop is packaged in a case of 20-SOIC (0.295, 7.50mm Width). A package named Tubeincludes it. T flip flop uses Tri-State, Non-Invertedas its output configuration. There is a trigger configured with Positive Edge. Surface Mountis occupied by this electronic component. A voltage of 4.5V~5.5Vis used as the supply voltage. A temperature of 0°C~70°C TAis considered to be the operating temperature. This logic flip flop is classified as type D-Type. In this case, it is a type of FPGA belonging to the 74F series. Its output frequency should not exceed 140MHz. D latch consists of 1 elements. As a result, it consumes 86mA quiescent current and is not affected by external forces. There are 20 terminations,It is powered by a voltage of 5V . In this case, the D flip flop belongs to the F/FASTfamily. As soon as 5.5Vis reached, Vsup reaches its maximum value. A normal operating voltage (Vsup) should remain above 4.5V. A total of 2ports are embedded in the D flip flop.